Resistive Random Access Memory Research Articles

Optimizing molybdenum oxide based RRAM with vacuum rapid thermal annealing and carbon quantum dots

The performance of resistive random access memory (RRAM) is significantly influenced by the dielectric layer and interface. In this study, the vacuum rapid thermal annealing (VacRTA) process and the incorporation of carbon quantum dots (CQDs) were employed to enhance the device performance. The VacRTA process induced extra oxygen vacancies in the MoOx film, reducing the energy required for the formation of Ag conductive filaments (CFs). In addition, CQDs were spin-coated on the bottom electrode (BE) interface to effectively fix the position of Ag CFs formation and rupture. The improved device exhibits remarkable performance enhancements compared to the pristine device, including a centralized distribution of resistance states and operating voltages, extended endurance cycles (1 × 107), enhanced cell-to-cell coherence, and favorable neural synaptic properties. These results demonstrate the potential of CQDs incorporated MoOx based RRAM for next generation non-volatile memory and neural synapse simulation.

Measuring Electrical Resistivity at the Nanoscale in Phase-Change Materials.

Electrical resistivity is the key parameter in the active regions of many current nanoscale devices, from memristors to resistive random-access memory and phase-change memories. The local resistivity of the materials is engineered on the nanoscale to fit the performance requirements. Phase-change memories, for example, rely on materials whose electrical resistance increases dramatically with a change from a crystalline to an amorphous phase. Electrical characterization methods have been developed to measure the response of individual devices, but they cannot map the local resistance across the active area. Here, we propose a method based on operando electron holography to determine the local resistance within working devices. Upon switching the device, we show that electrical resistance is inhomogeneous on the scale of only a few nanometers.

Highly flexible and uniform switching of poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate)based RRAM achieved through Ag NWs embedded for high-density storage

A super-flexible resistive random access memory (RRAM) based on poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) embedded with Ag nanowires (Ag NWs) is fabricated on a piece of aluminum foil. In the design, the aluminum foil is used as the substrate as well as the electrode, which not only solves the flexibility of the device, but also greatly reduces the volume of the device, helpful to realize high-density integration. The uniformity of the device is greatly improved after the modification of the Ag NWs. The fluctuation range of the Set voltage (Vset) / Reset voltage (Vreset) is reduced from 0.9~2.78 V/ −0.45∼-1.25 V to 1.14∼1.35 V/-1 ∼0.5 V. What’s more, the average Vset / Vreset is decreased from 2.5 V/-1.25 V to 1.2 V/-0.7 V. Also, the multilevel switching potential of the device is confirmed by controlling the reset voltage((-0.5, −0.7, and −1.0 V). After repetitive 1000 bendings of the device with a radius of 6 mm, a stable memory window of more than 103 is still detected during 300 continuous cycles. No degradation is observed from the two resistance states at 85 °C after 104 s. These results clearly demonstrate that the device has a broad application prospect in the future application of flexible electronics due to its simple and thin structure, low cost, excellent flexibility and good uniformity.

Stable and repeatable ZrO2 RRAM achieved by NiO barrier layer for negative set phenomenon elimination

Resistive random-access memory (RRAM) is a promising non-volatile memory technology due to its fast operation, low power consumption, and high reliability. However, the negative set phenomenon remains a challenge for RRAM, which can lead to the deterioration of device switching parameters. In this study, we successfully addressed this issue by inserting a NiO blocking layer between the ZrO2 and Ag top electrodes in ZrO2-based RRAM. In addition, the resistive switching characteristics of the device are significantly enhanced by the incorporation of a p-type oxide NiO layer. Compared to single-layer ZrO2 devices, the double-layer Ag/NiO/ZrO2/ITO RRAM exhibits improved cycling durability (>500 cycles) and good retention time (3 × 104s). Our analysis of the device conduction mechanism and proposed resistive switching model suggest that oxygen vacancies play a connecting role in the reset process, leading to failed reset behavior. Through the incorporation of a p-type semiconductor NiO layer into ZrO2-based RRAMs, the interference of oxygen vacancies on the reset process can be effectively impeded. This approach not only provides an effective resolution to the unforeseen negative set phenomenon in RRAM devices, but it also holds paramount significance for the advancement of high-performance RRAMs.

Data Pruning-enabled High Performance and Reliable Graph Neural Network Training on ReRAM-based Processing-in-Memory Accelerators

Graph Neural Networks (GNNs) have achieved remarkable accuracy in cognitive tasks such as predictive analytics on graph-structured data. Hence, they have become very popular in diverse real-world applications. However, GNN training with large real-world graph datasets in edge-computing scenarios is both memory- and compute-intensive. Traditional computing platforms such as CPUs and GPUs do not provide the energy efficiency and low latency required in edge intelligence applications due to their limited memory bandwidth. Resistive random-access memory (ReRAM)-based processing-in-memory (PIM) architectures have been proposed as suitable candidates for accelerating AI applications at the edge, including GNN training. However, ReRAM-based PIM architectures suffer from low reliability due to their limited endurance, and low performance when they are used for GNN training in real-world scenarios with large graphs. In this work, we propose a learning-for-data-pruning framework, which leverages a trained Binary Graph Classifier (BGC) to reduce the size of the input data graph by pruning subgraphs early in the training process to accelerate the GNN training process on ReRAM-based architectures. The proposed light-weight BGC model reduces the amount of redundant information in input graph(s) to speed up the overall training process, improves the reliability of the ReRAM-based PIM accelerator, and reduces the overall training cost. This enables fast, energy-efficient, and reliable GNN training on ReRAM-based architectures. Our experimental results demonstrate that using this learning for data pruning framework, we can accelerate GNN training and improve the reliability of ReRAM-based PIM architectures by up to 1.6 ×, and reduce the overall training cost by 100 × compared to state-of-the-art data pruning techniques.

Approaching the Ideal Linearity in Epitaxial Crystalline-type Memristor by Controlling Filament Growth.

Brain-inspired neuromorphic computing has attracted widespread attention owing to its ability to perform parallel and energy-efficient computation. However, the synaptic weight of amorphous/polycrystalline oxide based memristor usually exhibits large nonlinear behaviour with high asymmetry, which aggravates the complexity of peripheral circuit system.[6-10] Controllable growth of conductiv filaments is highly demanded for achieving the highly-linear conductance modulat ion. However, the stochastic behaviour of the filament growth in commonly used amorphous/polycrystalline oxide memristor makes it very challenging. Here, we report the epitaxially grown Hf0.5Zr0.5O2-based memristor with the linearity and symmetry approaching ideal case. A layer of Cu nanoparticles is inserted into epitaxially grown Hf0.5Zr0.5O2 film to form the grain boundaries due to the breaking of the epitaxial growth. By combining with the local electric field enhancement, the growth of filament is confined in the grain boundaries due to the fact that the diffusion of oxygen vacancy in crystalline lattice is more difficult than that in the grain boundaries. Furthermore, the decimal operation and high-accuracy neural network are demonstrated by utilizing the highly-linear and multi-level conductance modulation capacity. Our method opens an avenue to control the filament growth for the application of resistance random access memory (RRAM) and neuromorphic computing. This article is protected by copyright. All rights reserved.

Ultra-high ON/OFF Ratio with Low Set Voltage for a Pt-Nb2O5-Pt Resistivity Switching Device

The limited ON/OFF ratio constrains the quantity of available resistance states and the multi-level storage capability, a high ON/OFF ratio (>103) is essential for implementing multi-level storage in a resistive device. Through annealing processes for Nb2O5 films prepared by magnetron sputtering, we successfully achieved an ultra-high ON/OFF ratio of 106 and a four-order higher resistance compared to conventional binary oxide resistive random-access memory. Results confirm that annealing can effectively modulate the content of oxygen vacancies within the resistance-switching layer and the formation path of oxygen vacancies. At the same time, we observed a gradual decrease in the set voltage of the device with increasing annealing temperature, which is beneficial for the low power consumption characteristics. Therefore, appropriate annealing is a novel and effective approach to optimize device performances for better information storage applications, and its core mechanism is to modulate the concentration of Vo for constructing fixed conductive paths.

Enhancing the Uniformity of a Memristor Using a Bilayer Dielectric Structure

Resistive random access memory (RRAM) holds great promise for in-memory computing, which is considered the most promising strategy for solving the von Neumann bottleneck. However, there are still significant problems in its application due to the non-uniform performance of RRAM devices. In this work, a bilayer dielectric layer memristor was designed based on the difference in the Gibbs free energy of the oxide. We fabricated Au/Ta2O5/HfO2/Ta/Pt (S3) devices with excellent uniformity. Compared with Au/HfO2/Pt (S1) and Au/Ta2O5/Pt (S2) devices, the S3 device has a low reset voltage fluctuation of 2.44%, and the resistive coefficients of variation are 13.12% and 3.84% in HRS and LRS, respectively, over 200 cycles. Otherwise, the bilayer device has better linearity and more conductance states in multi-state regulation. At the same time, we analyze the physical mechanism of the bilayer device and provide a physical model of ion migration. This work provides a new idea for designing and fabricating resistive devices with stable performance.

Realization of Multiple Synapse Plasticity by Coexistence of Volatile and Nonvolatile Characteristics of Interface Type Memristor.

Studies on neuromorphic computing systems are becoming increasingly important in the big-data-processing era as these systems are capable of energy-efficient parallel data processing and can overcome the present limitations owing to the von Neumann bottleneck. The Pt/WOx/ITO resistive random-access memory device can be used to implement versatile synapse functions because it possesses both volatile and nonvolatile characteristics. The gradual increase and decrease in the current of the Pt/WOx/ITO device with its uniform resistance state for endurance and retention enables additional synaptic applications that can be controlled using electric pulses. If the volatile and nonvolatile device properties are set through rehearsal and forgetting processes, the device can emulate various synaptic behaviors, such as potentiation and depression, paired-pulse facilitation, post-tetanic potentiation, image training, Hebbian learning rules, excitatory postsynaptic current, and Pavlov's test. Furthermore, reservoir computing can be implemented for applications such as pattern generation and recognition. This emphasizes the various applications of future neuromorphic devices, demonstrating the various favorable characteristics of pulse-enhanced Pt/WOx/ITO devices.

Ab initio study of oxygen vacancy filament formation at Ta/HfO2 interface

The resistive switching (RS) behavior of resistive random access memory (RRAM) based on oxygen vacancy (VO) conduction is significantly affected by the interface properties between metal electrode and oxide layer, yet the modulation between the RS behavior and the physico-chemical properties of the interface is still not very clear. In this study, the correlative role of Ta/HfO2 interface with the RS behavior in HfO2-based RRAM is explored at atomic level. First-principles thermodynamic calculations show that the strong interaction between three-fold oxygen vacancies (VO3) leads to a formation of VO3-based conductive filament (CF) along direction perpendicular to the interface. Four-fold oxygen vacancies (VO4) make a major contribution to the re-formation and growth of CFs during the set process by diffusing into the residual filaments. The results of electronic properties further indicate that as the number of VOs perpendicular to the interface increases, the charge redistribution between O and Ta atoms at the interface is significantly increased, and more electron clouds are gathered around VOs. This is the underlying mechanism of forming a conductive channel. This study reveals the important regulation mechanism of the interface characteristics between metal electrode and oxide layer in RRAM on the formation and growth of VO-based CFs.

DenRAM: neuromorphic dendritic architecture with RRAM for efficient temporal processing with delays

An increasing number of studies are highlighting the importance of spatial dendritic branching in pyramidal neurons in the neocortex for supporting non-linear computation through localized synaptic integration. In particular, dendritic branches play a key role in temporal signal processing and feature detection. This is accomplished thanks to coincidence detection (CD) mechanisms enabled by the presence of synaptic delays that align temporally disparate inputs for effective integration. Computational studies on spiking neural networks further highlight the significance of delays for achieving spatio-temporal pattern recognition with pure feed-forward neural networks, without the need of resorting to recurrent architectures. In this work, we present “DenRAM”, the first realization of a feed-forward spiking neural network with dendritic compartments, implemented using analog electronic circuits integrated into a 130 nm technology node and coupled with Resistive Random Access Memory (RRAM) technology. DenRAM’s dendritic circuits use RRAM devices to implement both delays and synaptic weights in the network. By configuring the RRAM devices to reproduce bio-realistic timescales, and by exploiting their heterogeneity we experimentally demonstrate DenRAM’s ability to replicate synaptic delay profiles, and to efficiently implement CD for spatio-temporal pattern recognition. To validate the architecture, we conduct comprehensive system-level simulations on two representative temporal benchmarks, demonstrating DenRAM’s resilience to analog hardware noise, and its superior accuracy compared to recurrent architectures with an equivalent number of parameters. DenRAM not only brings rich temporal processing capabilities to neuromorphic architectures, but also reduces the memory footprint of edge devices, warrants high accuracy on temporal benchmarks, and represents a significant step-forward in low-power real-time signal processing technologies.

Fusion of memristor and digital compute-in-memory processing for energy-efficient edge computing.

Artificial intelligence (AI) edge devices prefer employing high-capacity nonvolatile compute-in-memory (CIM) to achieve high energy efficiency and rapid wakeup-to-response with sufficient accuracy. Most previous works are based on either memristor-based CIMs, which suffer from accuracy loss and do not support training as a result of limited endurance, or digital static random-access memory (SRAM)-based CIMs, which suffer from large area requirements and volatile storage. We report an AI edge processor that uses a memristor-SRAM CIM-fusion scheme to simultaneously exploit the high accuracy of the digital SRAM CIM and the high energy-efficiency and storage density of the resistive random-access memory memristor CIM. This also enables adaptive local training to accommodate personalized characterization and user environment. The fusion processor achieved high CIM capacity, short wakeup-to-response latency (392 microseconds), high peak energy efficiency (77.64 teraoperations per second per watt), and robust accuracy (<0.5% accuracy loss). This work demonstrates that memristor technology has moved beyond in-lab development stages and now has manufacturability for AI edge processors.

Flexible resistive memory device with egg-albumen/HfO x hybrid bilayer: fabrication and modeling of its switching variations

Egg-albumen, a natural polymer, in bilayer combination with ultrathin HfO x is explored as an active switching layer component in flexible resistive random access memory devices. The fabricated devices have shown excellent switching characteristics with a current on/off ratio of greater than 104, stable retention of both low resistance and high resistance states, reliable multiple cycle switching, and very low switching power (with set power as 0.5 µW and reset power as 3.1 mW). To investigate the electro-mechanical stability, devices were bent with different bending radii and it was found that negligible degradation in device performance was observed until a 5 mm bending radius. Furthermore, a simple mathematical model is used to simulate the devices’ characteristics and the values of fitting parameters were extracted with a root mean square error of less than 4.5%. Moreover, a switching variation was introduced by utilizing variations of the physical parameters, and a near practical physics based mathematical device model was demonstrated which can enable the strengthening of simulation capabilities for exploration of unique flexible resistive memory devices and related circuits.

Optimization of Bilayer Resistive Random Access Memory Based on Ti/HfO2/ZrO2/Pt.

In this paper, the electrothermal coupling model of metal oxide resistive random access memory (RRAM) is analyzed by using a 2D axisymmetrical structure in COMSOL Multiphysics simulation software. The RRAM structure is a Ti/HfO2/ZrO2/Pt bilayer structure, and the SET and RESET processes of Ti/HfO2/ZrO2/Pt are verified and analyzed. It is found that the width and thickness of CF1 (the conductive filament of the HfO2 layer), CF2 (the conductive filament of the ZrO2 layer), and resistive dielectric layers affect the electrical performance of the device. Under the condition of the width ratio of conductive filament to transition layer (6:14) and the thickness ratio of HfO2 to ZrO2 (7.5:7.5), Ti/HfO2/ZrO2/Pt has stable high and low resistance states. On this basis, the comparison of three commonly used RRAM metal top electrode materials (Ti, Pt, and Al) shows that the resistance switching ratio of the Ti electrode is the highest at about 11.67. Finally, combining the optimal conductive filament size and the optimal top electrode material, the I-V hysteresis loop was obtained, and the switching ratio Roff/Ron = 10.46 was calculated. Therefore, in this paper, a perfect RRAM model is established, the resistance mechanism is explained and analyzed, and the optimal geometrical size and electrode material for the hysteresis characteristics of the Ti/HfO2/ZrO2/Pt structure are found.

Atomic layer annealing for spatial tailoring in sub-4 nm AlN RRAM devices with low-voltage operation

This article investigates the spatial tailoring of nitrogen vacancies by atomic layer annealing (ALA) on resistive random access memory (RRAM) devices with an AlN resistive switching layer. The ALA technique involves the in-situ layer-by-layer He/Ar plasma treatment in the cycle of atomic layer deposition for AlN. The AlN RRAM devices prepared with the ALA treatment near the TiN electrode have significantly superior uniformity of the operation voltages and the switching resistances, along with a lower cycle-to-cycle variation in endurance. This enhancement could be attributed to the relatively stable location of rupture and formation of conductive filaments, as a result of the film densification and the suppression of nitrogen vacancies in the AlN region treated with the ALA process. The AlN RRAM devices also demonstrate excellent retention of more than 106 seconds at 125°C. In addition, the ultra-thin 3.3 nm AlN switching layer contributes to low operation voltages of AlN RRAM. The outcomes manifest that the ALA technique could effectively improve the properties of nanoscale materials through precise spatial tailoring, with an accuracy up to atomic scale.

Modeling of Self-Aligned Selector Based on Ultra-Thin Metal Oxide for Resistive Random-Access Memory (RRAM) Crossbar Arrays.

Resistive random-access memory (RRAM) is a crucial element for next-generation large-scale memory arrays, analogue neuromorphic computing and energy-efficient System-on-Chip applications. For these applications, RRAM elements are arranged into Crossbar arrays, where rectifying selector devices are required for correct read operation of the memory cells. One of the key advantages of RRAM is its high scalability due to the filamentary mechanism of resistive switching, as the cell conductivity is not dependent on the cell area. Thus, a selector device becomes a limiting factor in Crossbar arrays in terms of scalability, as its area exceeds the minimal possible area of an RRAM cell. We propose a tunnel diode selector, which is self-aligned with an RRAM cell and, thus, occupies the same area. In this study, we address the theoretical and modeling aspects of creating a self-aligned selector with optimal parameters to avoid any deterioration of RRAM cell performance. We investigate the possibilities of using a tunnel diode based on single- and double-layer dielectrics and determine their optimal physical properties to be used in an HfOx-based RRAM Crossbar array.

SiNx‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

Herein, a digital–analog hybrid resistive random‐access memory (RRAM) is prepared by integrating the structurally similar SiNx‐based digital‐type RRAM with analog‐type RRAM by heterogeneous integration method. The Pt/SiNx/Ta/Ru is a digital RRAM due to the formation and breakage of the internal silicon dangling bonds conductive filaments, and the TiN/SiNx/Ta/Ru structure is an analog RRAM due to the traps‐filled limit region of the space‐charge limited current. The heterogeneously integrated digital RRAM has good cycling stability and endurance characteristics, and the heterogeneously integrated analog RRAM has high linearity and multistate counting characteristics. This heterogeneous integration approach is useful for the implementation of hybrid digital–analog RRAM.

Three-Dimensional Resistive Random-Access Memory Based on Stacked Double-Tip Silicon Nanowires for Neuromorphic Systems

Three-Dimensional Resistive Random-Access Memory Based on Stacked Double-Tip Silicon Nanowires for Neuromorphic Systems

Exploring bipolar resistive switching behavior of sprayed BaTiO3 thin films for nonvolatile memory application

The memristive properties of barium titanate (BT) thin films deposited by cost-effective spray pyrolysis technique are explored. The device was configured as Ag/BT/FTO. The electrical measurements unveiled robust bipolar resistive switching (BRS) characteristics in the devices with memory window ∼35. This behavior, attributed to intrinsic defects within BaTiO3, demonstrated the potential of these films for applications in advanced electronic devices like Resistive-Random Access Memory (RRAM). The observed phenomenon arises from the generation of polarized areas within the material, responsive to an applied electric field. Specifically focusing on the memristive aspects, this study indicated promising non-volatile memory performance. All devices undergo the SET process between 0.9 and 1.7 V, and the RESET process takes place between −1.3 to −1.9 V. According to the statistical distribution of SET and RESET voltages, the coefficient of variation (CV) for all devices is less than 18 %. The Ag/BT/FTO memristive device exhibited endurance through 103 cycles of switching, attesting to its reliability. Moreover, the device displayed the capability to maintain stored data for 104 seconds. This establishes the suitability of spray-deposited BaTiO3 thin films for memory-based applications.

Cross-coupled 4T2R multi-logic in-memory computing circuit design

Resistive random access memory (RRAM) is viewed as the next-generation memory model, surpassing the constraints of traditional random access memory. Given its non-volatile nature, which lessens static power consumption, RRAM boasts significant computing-in-memory (CIM) potential. We herein present a four-transistor/two-resistor cross-coupling structure based on RRAM. In this structure, two RRAMs are situated in opposite directions, a configuration referred to as reverse coding. This structure provides the flexibility and reconfigurability to adjust the RRAM connections, facilitating various CIM operations in fewer cycles. A full adder design was developed and its feasibility was validated through simulations. Monte Carlo analysis ensures the accuracy of logic operations, even while encountering significant resistance fluctuations. This approach effectively mitigates the resistance crossover observed in existing RRAM CIMs. Compared with previous methodologies, the proposed structure achieves greater robustness with fewer cycle counts and RRAM numbers, The comparison of our approach with state-of-the-art Boolean logic circuits for RRAM architecture shows significant improvement in both delay (1.4–4.1 × ) and the number of RRAM (1.2–6.6 × ).